K8P5516UZB-PI4E

GENERAL DESCRIPTION

The K8P5616UZB featuring single 3.0V power supply, is an 256Mbit NORtype Flash Memory organized as 32M x 8 or 16M x16. The memory architecture of the device is designed to divide its memory arrays into 256 blocks with independent hardware protection. This block architecture provides highly flexible erase and program capability. The K8P5616UZB NOR Flash consists of four banks. This device is capable of reading data from one bank while programming or erasing in the other banks.

FEATURES

• Single Voltage, 2.7V to 3.6V for Read and Write operations Voltage range of 2.7V to 3.1V valid for MCP product
• Organization
16M x16 bit (Word mode)
32M x 8 bit (Byte mode)
• Fast Read Access Time : 80ns
• Page Mode Operation
8 Words Page access allows fast asychronous read Page Read Access Time : 30ns
• Read While Program/Erase Operation
• Multiple Bank Architecture (4 Banks)
Bank 0: 32Mbit (64Kw x 32)
Bank 1: 96Mbit (64Kw x 96)
Bank 2: 96Mbit (64Kw x 96)
Bank 3: 32Mbit (64Kw x 32)
• OTP Block : Extra 256 word
- 128word for factory and 128word for customer OTP
• Power Consumption (typical value)
- Active Read Current : 30mA (@5MHz)
- Program/Erase Current : 25mA
- Read While Program or Read While Erase Current : 65mA
- Standby Mode/Auto Sleep Mode : 20uA
• Support Single & 32word Buffer Program
• WP/ACC input pin
- Allows special protection of first or last block of flash array at VIL, regardless of block protect status
- Removes special protection at VIH, the first or last block of flash array return to normal block protect status
- Reduce program time at VHH : 6us/word at Write Buffer
• Erase Suspend/Resume
• Program Suspend/Resume
• Unlock Bypass Mode
• Hardware RESET Pin
• Command Register Operation
• Supports Common Flash Memory Interface
• Industrial Temperature : -40°C to 85°C
• Extended Temperature : -25°C to 85°C
• Endurance : 100Kcycle
• Vio options at 1.8V and 3V I/O
• Package options
- 56 Pin TSOP (20x14mm)
- 64 Ball FBGA (11x13, 1.0mm Ball Pitch)